Positronic
201-500 employees
About Positronic
Headquartered in Springfield, MO Positronic Industries has been providing connector solutions worldwide since 1966. A vertically integrated manufacturer of high quality, high reliability interconnect solutions with solid machined contacts providing Connector Excellence® through ISO 9001, AS 9100 certification with a full service cable & harness plant that adheres to IPC-620 standards. With locations in the US, France, Singapore, India and China we are global presence ready to serve you wherever you need. Positronic Industries is led by President, John T. Gentry. CUSTOMER BASE: Positronic's customer base is largely Military/ Defense, Aerospace & Datacom/ Telecom. Other industries include Medical, Industrial and Rail/ Transit. PRODUCT LINE: D-Subminiature, Power, Rectangular, Circular, Environmental, Hermetic, Thermocouple, Fiber Optic and Cable Assemblies. Selected products meet one or more standards such as:Mil spec connector per: MIL-DTL-24308 (M24308), MIL-C-39029 (M39029, SAE AS39029), MIL-DTL-28748 (M28748), Goddard Aerospace connector (GSFC S-311),CCITT V.35 connector, PICMG 2.11 P 47, PICMG 3.0, PICMG 3.8 SAE J 2496, MTCA.0 and MTCA.1
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Description
- Positron.ai specializes in developing custom hardware systems to accelerate AI inference, offering significant performance and efficiency improvements over traditional GPU-based systems.
- The Principal ASIC Design Engineer will provide technical leadership across the entire ASIC design lifecycle, including architecture, microarchitecture, RTL implementation, and front-end signoff.
- The role involves defining system-level architecture, leading design and signoff activities, integrating high-speed interfaces and memory, establishing design methodologies, and collaborating with cross-functional teams.
- The engineer will mentor ASIC engineers, influence architecture decisions, and ensure silicon meets aggressive PPA, schedule, and quality targets.
- The position requires extensive experience in RTL design, industry-standard EDA tools, high-performance interface protocols, and leadership in ASIC/SoC projects, with a preference for experience in AI/ML accelerators and formal verification.
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Requirements
- BS/MS in EE/CE (or related) with 12+ years of ASIC/SoC RTL design experience
- Proven success in delivering blocks and subsystems from spec to silicon with excellent PPA results
- Expertise in SystemVerilog RTL, clocking, resets, CDC/RDC, and protocol correctness
- Experience with front-end design flows, EDA tools, and best practices
- Hands-on experience with at least four of: HBM/DDR, PCIe/CXL, AMBA AXI/ACE/CHI, cache/memory hierarchies, high-throughput datapaths, NoC design
- Strong influence on architecture and methodology decisions at the chip or system level
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Benefits
- Competitive salary and equity
- Comprehensive benefits package
- Flexible work environment